A sixth-generation,
64-bit 80x86-compatible
microprocessor designed by
Cyrix and manufactured by
IBM. The 6x86 combines aspects of both
RISC and
CISC. It has a
superscalar,
superpipelined[?] core, and performs
register renaming[?],
speculative execution[?],
out-of-order completion[?], and
data dependency removal[?]. It has a 16-
kilobyte primary
cache and is socket-compatible with the
Intel Pentium P54C[?]. It has six performance levels: PR 90+, PR 120+, PR 133+, PR 150+, PR 166+ and PR 200+.
The architecture of the 6x86 is more advanced than that of the Intel Pentium, incorporating some of the features of the Intel Pentium Pro[?]. At a given clock rate it executes most code more quickly than a Pentium would. However, its FPU is considerably less efficient than Intel's.
This article (or an earlier version of it) contains material from FOLDOC, used with permission.