Redirected from Core memory
The earliest work on core memory was carried out by the Shanghai-born American physicist, An Wang, who created the pulse transfer controlling device in 1949. The name referred to the way that the magnetic field of the cores could be used to control the switching of current in electro-mechanical systems. Wang was working at Harvard University's Computation Laboratory at the time, but unlike MIT, Harvard was not interested in promoting inventions created in their labs. Instead Wang was able to patent the system on his own.
His work was soon picked up and modified by Jay Forrester[?] while working on the Whirlwind project at MIT. This machine required a fast memory system for realtime[?] flight simulator use, and the core seemed like the only system that could fill the need. The construction costs at the time were increadibly high, each core was wired up by hand, typically by garment workers.
By the late 1950s industrial plants had been set up in the far east to build core. Inside, hundreds of low-paid workers strung cores for cents a day. This lowered the cost of core to the point where it had become largely universal as main memory by the early-1960s, replacing both the low-cost/low-performance drum memory as well as the high-cost/high-performance systems using vacuum tubes as memory. Core was in turn replaced by silicon memory chips (RAM) in the early 70s.
Dr. Wang's patent was not granted until 1955, and by this time core was already in use. This started a long series of lawsuits, which eventually ended when IBM paid Wang several million dollars to buy the patent outright. Wang used the funds to greatly increase the size of Wang Laboratories.
Core memory consists of a large number of small ferrite (magnetic metal) rings held together in a grid structure, with wires woven through the holes in the middle. In early systems there were four wires, X, Y, Sense and Inhibit, but later cores combined the latter two wires into one Sense/Inhibit line. Each ring stores one bit (a 0 or 1), so a huge number of cores are needed to form a reasonable amount of memory.
Core relies on the hysteresis of the magnetic material used to make the rings. Only a magnetic field over a certain intensity (generated by the wires through the core) can cause the core to change its magnetic polarity. To select a memory location, one of the X and one of the Y lines are driven with half the current required to cause this change. Only the combined magnetic field generated where the X and Y lines cross is sufficient to change the state, other cores will see only half the needed field, or none at all. By driving the current through the wires in a particular direction, the resulting induced field forces the selected core's magnetic field to point in one direction or the other (north or south).
Reading from core memory is somewhat complex. Basically the read operation consists of doing a "flip to 0" operation to the bit in question, that is, driving the selected X and Y lines at half power in the direction that causes the core to flip to whatever polarity the machine considers to be zero. If the ring was already in the 0 state nothing will happen. However if the ring was in the 1 state it will flip to 0. If this flip occurs, a brief pulse of power will be induced into the Sense line, saying, in effect, that the memory location used to hold a 1. If the pulse is not seen that meant no flip occurred, so the ring must have already been in the 0 state. Note that every read forces the ring in question into the 0 state, so reading is destructive, which is one of the oddities of core memory.
Writing is similar in concept, but always consists of a "flip to 1" operation, relying the memory already having been set to the 0 state in a previous read. If the ring in question is to hold a 1, then the operation proceeds normally and the ring flips to 1. However if the ring is to instead hold a zero, a small amount of current is sent into the Inhibit line, enough to drop the combined field from the X and Y lines below the amount needed to make the flip. This leaves the core in the 0 state.
Note that the Sense and Inhibit wires are used one after the other, never at the same time. For this reason later core systems combined the two into a single wire, and used circuitry in the memory controller to switch the duty of the wire from Sense to Inhibit.
Due to the fact that core always requires a write after read, many computers included instructions that took advatage of this. These instructions would be used when the same location was going to be read, changed and then written, like an increment operation for instance. In this case the computer would ask the memory controller to do the read, but then signal it to pause before doing the write that would normally follow. When the instruction was complete the controller would be unpaused, and the write would occur with the new value. For certain types of operations, this effectively doubled the speed.
This was important, because core memory is quite slow. Early systems had cycle times of about 6µs, which had fallen to 1.2µs by the early 1970s, and by the mid-70s it was down to 600ns. Everything possible was done in order to speed access, including using different banks of core each storing one bit of an address. For instance a machine might use 32 banks of core with a single bit of the 32-bit word in each one, and the controller could access the entire 32-bit word in a single read/write cycle.
Core memory is non-volatile[?] – it can retain its contents indefinitely without power. It is also relatively unaffected by EMP and radiation. These were important advantages for some applications like spacecraft, and led to core being used for a number of years after availability of MOS[?] memory.
A characteristic of core was that it is current-based, not voltage-based. The "half select current" was typically about 400 milliamp for later, smaller, faster cores. Earlier larger cores required more current
Another characteristic of core is that the hystersis loop was temperature sensitive, the proper half select current at one temperature is not the proper half select current at another temperature. So the memory controllers could include temperature sensors (typically a thermistor) to check the temperature and adjust the current levels to correct for temperature changes. Another method of handling the temperature sensitivity was to enclose the magnetic core "stack" in a temperature controlled oven. An example of this was the core memory in the IBM 1620 which could take up to 30 mnutes to reach proper temperature (about 106 F) and allow the machine to work correctly.
Although computer memory long ago moved to silicon chips, a file which is a dump of memory produced after a program error is still known as a core dump.
See also:
wikipedia.org dumped 2003-03-17 with terodump