The first ASIC was probably the ULA (Uncommitted Logic Array) produced by British firm Ferranti[?] around 1980. These were customised by varying the metal interconnect mask. They had complexities of up to a few thousand gates. Later versions were generalised into gate arrays with different base dies customised by both metal and polysilicon layers. Some base dies include RAM elements.
Alternatively, the customisation could include everything, requiring a large (and expensive) mask-set[?]. If previously characterised elements only were used, these were described as standard-cell, otherwise they were full-custom.
As feature sizes have shrunk and design tools improved over the years, the maximum complexity (and hence functionality) has increased from 5000 gates to 5 million or more. Modern ASICs often include 32-bit processors and other large building-blocks. These ASICs are often referred to as SoC - System on a Chip.
A growing trend in ASICs is the use of intellectual property or IP. Many ASIC houses have had standard cell libraries for years. However IP takes the reuse of designs to a new level. Most complex digital ICs are now designed with computer languages that describe electronics rather than code. Many organizations now sell tested functional blocks written in these languages. For example, one can purchase CPU's, Ethernet or telephone interfaces.
For smaller designs and/or lower production volumes, ASICs are becoming a less attractive solution, as field-programmable gate arrays (FPGAs) grow larger, faster and more capable. Some SoCs consist of a microprocessor, various types of memory and a large FPGA.
See also embedded system
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